#ifndef __MAIN_H
#define __MAIN_H

#define CCM_CCGR0 *((volatile unsigned int *)0X020C4068)
#define CCM_CCGR1 *((volatile unsigned int *)0X020C406C)
#define CCM_CCGR2 *((volatile unsigned int *)0X020C4070)
#define CCM_CCGR3 *((volatile unsigned int *)0X020C4074)
#define CCM_CCGR4 *((volatile unsigned int *)0X020C4078)
#define CCM_CCGR5 *((volatile unsigned int *)0X020C407C)
#define CCM_CCGR6 *((volatile unsigned int *)0X020C4080)

#define SW_MUX_GPIO1_IO03 *((volatile unsigned int *)0x020E0068) 
#define SW_PAD_GPIO1_IO03 *((volatile unsigned int *)0x020E02F4) 

#define GPIO1_BASE (0x0209C000)
#define GPIO2_BASE (0x0209C000 + 0x400)
#define GPIO3_BASE (0x0209C000 + 0x400 * 2)
#define GPIO4_BASE (0x0209C000 + 0x400 * 3)
#define GPIO5_BASE (0x0209C000 + 0x400 * 4)

typedef struct
{
    volatile unsigned int DR;
    volatile unsigned int GDIR;
    volatile unsigned int PSR;
    volatile unsigned int ICR1;
    volatile unsigned int ICR2;
    volatile unsigned int IMR;
    volatile unsigned int ISR;
    volatile unsigned int SEL;
}GPIO_TYPEDEF;

#define GPIO1 ((GPIO_TYPEDEF*)GPIO1_BASE)
#define GPIO2 ((GPIO_TYPEDEF*)GPIO2_BASE)
#define GPIO3 ((GPIO_TYPEDEF*)GPIO3_BASE)
#define GPIO4 ((GPIO_TYPEDEF*)GPIO4_BASE)
#define GPIO5 ((GPIO_TYPEDEF*)GPIO5_BASE)



#endif // !__MAIN_H
